A recent development of technology has introduced the use of Printed Circuit Board (PCB) laminates as substrates for the manufacturing of electronic modules which can be of the Single Chip Module (SCM) type or Multi Chip Module (MCM) type. These modules are provided with a plurality of conductive pads for electrical connection with electronic circuits (such as mother boards, back planes, application boards). The electrical connection is achieved by little spherical portions of solder alloy which give the name of Ball Grid Array (BGA) to this kind of electronic module. Usually such modules use PCB laminates made of organic material. These modules are usually called Plastic Ball Grid Arrays. The definition "Plastic" indicates the flexible nature of the PCB as opposed to a ceramic substrate. Another example of a BGA module is the Tape BGA (TBGA) which uses a tape of organic material as substrate instead of the laminate. The Plastic BGA are also called "organic": the definition derives from the epoxies resin compounds (organic chemistry) used to build these laminates.
One possible Plastic BCA module is the Cavity Down package as shown in FIG. 1. The main difference between the Cavity Down module and a more usual chip-up package, is that the active element 101 is attached on the lower side of the module, on the same side of the solder balls 107 through which the module will be attached to the mother board 105. The active device (or chip) 101 is positioned in a sort of cavity of the organic substrate 113, which completely surrounds the active element 101. This arrangement presents some advantages with respect to the Chip-Up PBGA module. One of the advantages is the reduced thickness of the resulting package, since the chip is "contained" in the substrate. Furthermore, these modules provide a better heat dissipation, because the active element is usually attached to a metal stiffener 103 which constitutes the top face of the module and also acts as heat dissipator. Usually these packages use wire bonding 109 to connect the active device with the circuits on the substrate. Cavity-down packages are very effective to optimise high performance Silicon, Silicon Germanium or GaAs devices. More generally, all those applications which work in the high frequency range, are preferably realised in cavity packages because this electronic package has several advantages for the applications and for the devices performance.
In cavity-down packages the active device (or chip) is usually inserted in the cavity and attached to the bottom of the cavity by means of a glue layer. As shown in FIGS. 2A-2C, a dot of glue 201 is dropped on the bottom of a cavity and then an active device is pressed on top of it, the glue spreads and covers the whole cavity floor. When all air gaps have been replaced by the glue, this starts to escape in the gap 111 that exists between the vertical walls of the chip and the cavity. If the device is not pressed against the cavity it can float over the glue, without providing the required parallelism or flatness. The chip needs to be completely parallel and flat with respect to the substrate surface in order to allow a correct wire bonding. Furthermore, the glue under the chip may not cover completely the area between the device and the metal cavity floor; this may allow the formation of bubbles in the following encapsulation operation and will definitively affect the thermal dispersion characteristic of the assembled device with a severe impact to the product's reliability.
Parallelism and narrow gaps are mandatory in cavity down packages for telecom and all the other high frequency applications where the working frequency of the device is above 1 GHz. Excessive wire bond length in these application is one of the major contributors to signal attenuation. For this reason it is important to keep the wire length to the minimum possible length. As an example, 1 mm of a 32 .mu.m gold wire gives an inductance of approximately 1 nH; high frequency applications designers require a maximum inductance in the order of 0,6-0,8 nH. To achieve such low inductance values it is important to reduce as much as possible the gap 111 between the chip and the cavity package. This taking into consideration that the size of the component used in these applications is in the range of few mm, with a thickness of few tenths of a millimetre. According to a preferred embodiment of the present invention the gap between the chip and the cavity wall is about 0.1 mm. In any case it should not exceed 0.3 mm for acceptable inductance values.
Volume control of the dispensed glue dot is a very difficult aspect of the assembling operation; the glue dispensing operation faces some intrinsic limitations, such as the minimum needle diameter that is itself determined by the glue viscosity and rheology. Furthermore, the quantity of glue to he dispensed is in the order of one milligram (for a 4 mm =3 mm =0.2 mm chip) while the minimum dispensing quantity, using the most sophisticated volumetric head on automated equipment, is about 5 milligrams. This 5 milligrams limitation rules out active dispensing, while the alternative remains passive glue dispensing, but questionable repetitive results may be reached only with high capital investments.
As shown in FIGS. 2a-2c, when the device 101 is pushed down until it reaches the cavity floor 203, the glue is pushed up through the whole perimeter gap 111 between the chip and the packaging carrier. When the glue reaches the top surface of the active device it spreads over the bonding pads. The overflowing glue 207 makes the metallic bonding pads no longer available for electrical connections; at this point the package is irreparably damaged and, considering the high cost of these devices this may be a big waste of money.
The present invention has the object to provide a technique which alleviates the above drawbacks.